Publications

2024

• Challenges for Quantum Software Engineering: An Industrial Application Scenario Perspective (PDF)
  C. Carbonelli, M. Felderer, M. Jung, E. Lobe, M. Lochau, S. Luber, W. Mauerer, R. Ramler, I. Schaefer, and C. Schroth, April, 2024,
  
  

• QCEDA: Using Quantum Computers for EDA (arXiv)
  M. Jung, S. O. Krumke, C. Schroth, E. Lobe, W. Mauerer. ArXiv, March, 2024,
  
  

2023

• A Precise Measurement Platform for LPDDR4 Memories
  J. Feldmann, L. Steiner, D. Christ, T.Psota, M. Jung, and N. Wehn. ACM International Symposium on Memory Systems (MEMSYS 2023), October, 2023, Washington, DC, USA
  
  
• Neues Ausbildungsmaterial für alle Klassen (Video, Proceedings)
  M. Jung and B. Swierczek. Amateurfunk-Tagung, 2023, München.
  
  
• Automatic DRAM Subsystem Configuration with irace
  L. Steiner, G. Delazeri, I. Prando Da Silva, M. Jung and N. Wehn. International Conference on High-Performance and Embedded Architectures and Compilers 2020 (HiPEAC), Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), January, 2023, Toulouse, France.
  
  

2022

• A Framework for Formal Verification of DRAM Controllers (DOI, Arxiv)
  L. Steiner, C. Sudarshan, M. Jung, D. Stoffel and N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2022), October, 2022, Washington, DC, USA
  
  
• Unveiling the Real Performance of LPDDR5 Memories (DOI, Arxiv)
  L. Steiner, M. Jung, M. Huonker and N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2022), October, 2022, Washington, DC, USA
  
  
• Amateurfunkprüfung: Zwischenstand neuer Fragenkatalog (Video, Proceedings)
  M. Jung, B. Swierczek. Weinheimer UKW-Tagung, Weinheim. Germany, September, 2022
  
  
• Split'n'Cover: ISO26262 Hardware Safety Analysis with SystemC (DOI)
  D. Uecker, M. Jung Springer LNCS International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS)., July, 2022, Samos Island, Greece.
  
  
• A Weighted Current Summation based Mixed Signal DRAM-PIM Architecture for Deep Neural Network Inference (DOI)
  C. Sudarshan, T. Soliman, J. Lappas, C. Weis, M. H. Sadi, M. Jung, A. Guntoro and N. Wehn Journal on Emerging and Selected Topics in Circuits and Systems (JETCAS)., June 2022
  
  
• DRAMSys4.0: An Open-Source Simulation Framework for In-Depth DRAM Analyses (DOI/PDF)
  L. Steiner, M. Jung, F. S. Prado, K. Bykov, N. Wehn Springer, International Journal of Parallel Programming (IJPP), 2022
  
  

2021

• An LPDDR4 Safety Model for Automotive Applications (PDF, DOI)
  L. Steiner, K. Kraft, D. Uecker, M. Jung, M. Huonker and N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2021), October, 2021, Washington, DC, USA
  
  
• Online Working Set Change Detection with Constant Complexity (PDF)
  G. Vasan, É. F. Zulian, C. Weis, M. Jung and N. Wehn. ACM/IEEE International Symposium on Memory Systems (MEMSYS 2021), October, 2021, Washington, DC, USA
  
  
• SEC-Learn: Sensor Edge Cloud for Federated Learning (PDF)
  P. Aichroth, C. Antes, P. Gembatzka, H. Graf, D. Johnson, M. Jung, T. Kämpfe, T. Kleinberger, T. Köllmer, T. Kuhn, C. Kutter, J. Krüger, D. Loroch, H. Lukashevich, L. Zhang, N. Laleni, J. Leugering, R. Fernández, L. Mateu, S. Mojumder, B. Prautsch, K. Roscher, S. Schneickert, F. Vanselow, P. Wallbott, O. Walter and N. Weber Special Session on Next Generation Computing at International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XXI), July. 4-8, 2021, Samos, Greece
  
  
• Exploration of DDR5 with the Open Source Simulator DRAMSys (PDF, DOI)
  L. Steiner, M. Jung and N. Wehn IEEE/VDE 24. Workshop „Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen” (MBMV 2021), March. 18-19, 2021, Munich
  
  
• The Open Source DRAM Simulator DRAMSys4.0 (Video)
  M. Jung, L. Steiner, and N. Wehn IEEE/VDE 24. Workshop „Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen” (MBMV 2021), March. 18-19, 2021, Munich
  
  
• A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation (DOI)
  C. Sudarshan, L. Steiner, M. Jung, L. Lappas, C. Weis, and N. Wehn Published in IEEE Transactions on Circuits and Systems II: Express Briefs, 2021. Presented at the IEEE International Symposium on Circuits and Systems (ISCAS), May. 23-26, 2021, Daegu, Korea
  
  
• A Novel DRAM-Based Process-in-Memory Architecture and its Implementation for CNNs (DOI)
  C. Sudarshan, T. Soliman, C. de la Parra, C. Weis, L. Ecco, M. Jung, N. Wehn and A. Guntoro 26th Asia and South Pacific Design Automation Conference (ASP-DAC 2021), Jan.18-21, 2021, Tokyo Odaiba Waterfront, Japan
  
  

2020

• Design of Efficient, Dependable SoCs Based on a Cross-Layer-Reliability Approach with Emphasis on Wireless Communication as Application and DRAM Memories (DOI)
  C. Weis, C. Gimmler-Dumont, M. Jung, N. Wehn Bookchapter in the Springer Book "Dependable Embedded Systems", Edited by Jörg Henkel and Nikil Dutt, December, 2020
  
  
• Moderne Speicherarchitekturen für leistungsfähige Infotainmentsysteme und autonomes Fahren (DOI)
  M. Jung, M. Huonker, R. Kalmar and N. Wehn Springer ATZelektronik, 15, 16–21, November, 2020
  
  
• Efficient Generation of Application Specific Memory Controllers (DOI, Video)
  M. V. Natale, M. Jung, K. Kraft, F. Lauer, J. Feldmann, C. Sudarshan, C. Weis, S. O. Krumke, and N. Wehn ACM/IEEE International Symposium on Memory Systems (MEMSYS 2020), October, 2020, Washington, DC, USA
  
  
• An Energy Efficient 3D-Heterogeneous Main Memory Architecture for Mobile Devices (DOI)
  D. M. Mathew, F. S. Prado, É. F. Zulian, C. Weis, M. M. Ghaffar, M. Jung and N. Wehn ACM/IEEE International Symposium on Memory Systems (MEMSYS 2020), October, 2020, Washington, DC, USA
  
  
• An In-DRAM Architecture for Quantized CNNs using Fast Winograd Convolutions (DOI)
  M. M. Ghaffar, C. Sudarshan, C. Weis, M. Jung and N. Wehn ACM/IEEE International Symposium on Memory Systems (MEMSYS 2020), October, 2020, Washington, DC, USA
  
  
• The gem5 Simulator: Version 20.0+
  A new era for the open-source computer architecture simulator (Link)
  J. Lowe-Power, A. M. Ahmad, A. Akram, M. Alian, R. Amslinger, M. Andreozzi, A. Armejach, N. Asmussen, S. Bharadwaj, G. Black, G. Bloom, B. R. Bruce, D. R. Carvalho, J. Castrillon, L. Chen, N. Derumigny, S. Diestelhorst, W. Elsasser, M. Fariborz, A. Farmahini-Farahani, P. Fotouhi, R. Gambord, J. Gandhi, D. Gope, T. Grass, B. Hanindhito, A. Hansson, S. Haria, A. Harris, T. Hayes, A. Herrera, M. Horsnell, S. A. R. Jafri, R. Jagtap, H. Jang, R. Jeyapaul, T. M. Jones, M. Jung, S. Kannoth, H. Khaleghzadeh, Y. Kodama, T. Krishna, T. Marinelli, C. Menard, A. Mondelli, T. Mück, O. Naji, K. Nathella, H. Nguyen, N. Nikoleris, L. E. Olson, M. Orr, B. Pham, P. Prieto, T. Reddy, A. Roelke, M. Samani, A. Sandberg, J. Setoain, B. Shingarov, M. D. Sinclair, T. Ta, R. Thakur, G. Travaglini, M. Upton, N. Vaish, I. Vougioukas, Z. Wang, N. Wehn, C. Weis, D. A. Wood, H. Yoon, É. F. Zulian. arXiv Preprint , July, 2020
  
  
• eBrainII: A 3 kW Realtime Custom 3D DRAM integrated ASIC implementation of a Biologically Plausible Model of a Human Scale Cortex (Link, PDF)
  D. Stathis, C. Sudarshan, Y. Yang, M. Jung, S. Asad, M. H. Jafri, C. Weis, A. Hemani, A. Lansner, N. Wehn. Springer Journal of Signal Processing Systems, July, 2020
  
  
• The Dynamic Random Access Memory Challenge in Embedded Computing Systems (DOI)
  M. Jung, C. Weis, and N. Wehn In Jian-Jia Chen (Eds.), A Journey of Embedded and Cyber-Physical Systems., July, 2020, Springer
  
  
• DRAMSys4.0: A Fast and Cycle-Accurate SystemC/TLM-Based DRAM Simulator (DOI, Link, GitHub)
  L. Steiner, M. Jung, F. S. Prado, K. Bykov, and N. Wehn Springer LNCS International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2020, Samos Island, Greece.
  
  
• Fast and Accurate DRAM Simulation: Can we Further Accelerate it? (PDF, Link )
  J. Feldmann, M. Jung, K. Kraft, L. Steiner and N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2020, Grenoble, France.
  
  
• System Simulation with PULP Virtual Platform and SystemC (PDF, DOI)
  É. F. Zulian, G. Haugou, C. Weis, M. Jung, N. Wehn. International Conference on High-Performance and Embedded Architectures and Compilers 2020 (HiPEAC), Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), January, 2020, Bologna, Italy.
  
  

2019

• Driving Into the Memory Wall – The Role of Memory for Advanced Driver Assistance Systems and Autonomous Driving (PDF)
  M. Jung Invited Talk on the JEDEC Automotive Electronics Forum, November, 2019, Munich, Germany
  
  
• Fast Validation of DRAM Protocols with Timed Petri Nets (PDF)
  M.Jung, K.Kraft, T. Soliman, C. Sudarshan, C. Weis and N.Wehn ACM/IEEE International Symposium on Memory Systems (MEMSYS 2019), October, 2019, Washington, DC, USA
  Chair's Choice Best Paper Award
  
  
• Fast Simulation of DRAMs with Neural Networks
  M. Jung, J. Feldmann, Muhammad M. Ghaffar, Norbert Wehn. Talk on the 1st ACM/IEEE Workshop on Machine Learning for CAD (MLCAD), September, 2019, Canmore (Banff Area), Alberta, Canada
  
  
• Rapid Identification of Shared Memory in Multithreaded Embedded Systems with Static Scheduling(DOI, ACM Free Access)
  J. Jahic, V. Kumar, M. Jung, G. Wirrer, N. Wehn, T. KuhnInternational Workshop on Embedded Multicore Systems (ICPP-EMS 2019) in conjunction with the 48th International Conference on Parallel Processing (ICPP 2019), August, 2019, Kyoto, Japan.
  
  
• Embedded Computer Systems: Architectures, Modeling, and Simulation 19th International Conference, SAMOS 2019, Samos, Greece, July 7–11, 2019, Proceedings (DOI)
  Editors: Dionisios N. Pnevmatikatos, Maxime Pelcat and Matthias Jung, Lecture Notes in Computer Science book series (LNCS, volume 11733), Springer Nature Switzerland AG 2019
  
  
• A Lean, Low Power, Low Latency DRAM Memory Controller for Transprecision Computing (DOI, Link)
  C. Sudarshan, J. Lappas, C. Weis, D. M. Mathew, M. Jung and N. Wehn. Springer LNCS International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2019, Samos Island, Greece.
  
  
• RRAMSpec: A Design Space Exploration Framework for High Density Resistive RAM (Link)
  D. M. Mathew, A. L. Chinazzo, C. Weis, M. Jung, B. Giraud, P. Vivet, A. Levisse and N. Wehn. Springer LNCS International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2019, Samos Island, Greece.
  
  
• An In-DRAM Neural Network Processing Engine (PDF, DOI)
  C. Sudarshan, J. Lappas, M. M. Ghaffar, V. Rybalkin, C. Weis, M. Jung and N. Wehn. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2019, Sapporo, Japan
  
  
• Speculative Temporal Decoupling Using fork() (PDF, Video, DOI)
  M. Jung, F. Schnicke, M. Damm, T. Kuhn and N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2019, Florence, Italy
  
  
• 3D Stacked DRAM Memories (Link)
  C. Weis, M. Jung, N. Wehn. Book chapter in the Handbook of 3D Integration Vol 4, Wiley-VCH, 2019.
  
  

2018

• A Framework for Non-Intrusive Trace-driven Simulation of Manycore Architectures with Dynamic Tracing Configuration (DOI)
  J. Jahić, M. Jung, T. Kuhn, C. Kestel, and N. Wehn, The 18th International Conference on Runtime Verification (RV 2018), November, 2018, Limassol, Cyprus
  
  
• Efficient Coding Scheme for DDR4 Memory Subsystems (PDF, DOI, ACM Free Access)
  K. Kraft, D. M. Mathew, C. Sudarshan, M. Jung, C. Weis, N. Wehn and F. Longnos, ACM International Symposium on Memory Systems (MEMSYS 2018), October, 2018, Washington, DC, USA
  Best Paper Award
  
  
• Driving Into the Memory Wall: The Role of Memory for Advanced Driver Assistance Systems and Autonomous Driving (PDF, DOI, ACM Free Access)
  M. Jung, S. A. McKee, C. Sudarshan, C. Dropmann, C. Weis, N. Wehn, ACM International Symposium on Memory Systems (MEMSYS 2018), October, 2018, Washington, DC, USA
  
  
• Enabling Continuous Software Engineering for Embedded Systems Architectures with Virtual Prototypes (DOI, Video [Pablo Antonino])
  P. O. Antonino, M. Jung, A. Morgenstern, F. Faßnacht, T. Bauer, A. Bachorek, T. Kuhn, and E. Y. Nakagawa. 12th European Conference on Software Architecture (ECSA 2018), Madrid, Spain, Lecture Notes in Computer Science (LNCS), Springer, September 2018.
  
  
• A Model-Based Safety Analysis of Dependencies Across Abstraction Layers (DOI)
  C. Dropmann, E. Thaden, M. Trapp, D. Uecker, R. Amarnath, L. Avila da Silva, P. Munk, M. Schweizer, M. Jung, R. Adler. 37th International Conference on Computer Safety, Reliability and Security (SafeComp), September 2018, Västeras, Sweden
  
  
• BOSMI: A Framework for Non-Intrusive Monitoring and Testing of Embedded Multithreaded Software on the Logical Level (DOI)
  J. Jahić, T. Kuhn, M. Jung, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July 2018
  
  
• A Platform for Analyzing DDR3 and DDR4 DRAMs (Video, Summary, Original Paper)
  Matthias Jung, Deepak M. Mathew, Carl C. Rheinländer, Christian Weis, and Norbert Wehn. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2018, Florence, Italy
  
  
• The Role of Memories in Transprecision Computing (PDF, DOI)
  C. Weis, M. Jung, É. F. Zulian, C. Sudarshan, D. M. Mathew, N. Wehn. IEEE International Symposium on Circuits and Systems (ISCAS), May, 2018, Florence, Italy.
  
  
• A Memory Centric Architecture of the Link Assessment Algorithm in Large Graphs (DOI)
  C. Brugger, V. Grigorovici, M. Jung, C. De Schryver, C. Weis, N. Wehn, K. Zweig. IEEE Design & Test, 2018
  
  
• Driving Against the Memory Wall: The Role of Memory for Autonomous Driving (DOI)
  M. Jung, N. Wehn. Workshop: New Platforms for Future Cars: Current and Emerging Trends at IEEE Conference Design, Automation and Test in Europe (DATE), March, 2018, Dresden, Germany
  
  
• Improving the Error Behavior of DRAM by Exploiting its Z-Channel Property (DOI)
  K. Kraft, M. Jung, C. Sudarshan, D. M. Mathew, C. Weis, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2018, Dresden, Germany
  
  
• An Analysis on Retention Error Behavior and Power Consumption of Recent DDR4 DRAMs (DOI)
  D, M. Mathew, M. Schultheis, C. C. Rheinländer, C. Sudarshan, M. Jung, C. Weis, N. Wehn. IEEE Conference Design, Automation and Test in Europe (DATE), March, 2018, Dresden, Germany
  
  

2017

• Integrating DRAM Power-Down Modes in gem5 and Quantifying their Impact (DOI, ACM Free Access)
  R. Jagtap, M. Jung, W. Elsasser, C. Weis, A. Hansson, N. Wehn. ACM International Symposium on Memory Systems (MEMSYS 2017), October, 2017, Washington, DC, USA
  
  
• Using Run-Time Reverse-Engineering to Optimize DRAM Refresh (DOI, ACM Free Access)
  D. M. Mathew, É. F. Zulian, M. Jung, K. Kraft, C. Weis, B. Jacob, N. Wehn. ACM International Symposium on Memory Systems (MEMSYS 2017), October, 2017, Washington, DC, USA
  
  
• A New State Model for DRAMs Using Petri Nets (DOI, Link)
  M. Jung, K. Kraft, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2017, Samos Island, Greece.
  
  
• Supervised Testing of Concurrent Software in Embedded Systems (DOI, Link)
  J. Jahic, M. Jung, T. Kuhn, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2017, Samos Island, Greece.
  
  
• System Simulation with gem5 and SystemC: The Keystone for Full Interoperability (DOI, Link, Video)
  C. Menard, M. Jung, J. Castrillon, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2017, Samos Island, Greece.
  
  
• Support Development and Testing of Concurrent Software through Supervised Software Execution (Link)
  J. Jahic, T. Kuhn, M. Jung, N. Wehn. Advanced Computer Architecture and Compilation for High-Performance Embedded Systems (ACACES), July, 2017, Fiuggi, Italy.
  
  
• A Platform to Analyze DDR3 DRAM’s Power and Retention Time (PDF, DOI)
  M. Jung, D. Mathew, C. Rheinländer, C. Weis, N. Wehn. IEEE Design & Test, 2017.
  
  
• 3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems (DOI)
  P. Liu, A. Hemani, K. Paul, C. Weis, M. Jung, N. Wehn. International Journal of Parallel Programming (IJPP), Springer, April 2017.
  
  
• System-Level Modeling, Analysis and Optimization of DRAM Memories and Controller Architectures (Amazon)
  M. Jung. Forschungsberichte Mikroelektronik (26), University of Kaiserslautern, May 2017.
  
  
• DRAMSpec: A High-Level DRAM Timing, Power and Area Exploration Tool (DOI)
  C. Weis, A. Mutaal, O. Naji, M. Jung, A. Hansson, N. Wehn. International Journal of Parallel Programming (IJPP), Springer, 2017.
  
  
• A Bank-Wise DRAM Power Model for System Simulations (PDF, DOI, ACM Free Access)
  D. M. Mathew, É. F. Zulian, S. Kannoth, M. Jung, C. Weis, N. Wehn. International Conference on High-Performance and Embedded Architectures and Compilers 2016 (HiPEAC), Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), Stockholm, 2017.
  
  

2016

• A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D–Stacked Architecture (DOI)
  P. Liu, A. Hemani1, K. Paul, C. Weis, M. Jung, N. Wehn. International Journal of Signal Processing Systems, Springer, 2016.
  
  
• A New Bank Sensitive DRAMPower Model for Efficient Design Space Exploration (PDF, DOI)
  M. Jung, D. M. Mathew, É. F. Zulian, C. Weis, N. Wehn. International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS 2016), September, 2016, Bremen, Germany
  
  
• ConGen: An Application Specific DRAM Memory Controller Generator (PDF, DOI, ACM Free Access)
  M. Jung, I. Heinrich, M. Natale, D. M. Mathew, C. Weis, S. Krumke, N. Wehn. International Symposium on Memory Systems (MEMSYS 2016), October, 2016, Washington, DC, USA.
  Most Creative Presentation Award.
  
  
• Reverse Engineering of DRAMs: Row Hammer with Crosshair (PDF, DOI, ACM Free Access)
  M. Jung, C. Rheinländer, C. Weis, N. Wehn. ACM International Symposium on Memory Systems (MEMSYS 2016), October, 2016, Washington, DC, USA.
  Chair's Choice Best Paper Award.
  
  
• Exploring System Performance using Elastic Traces: Fast, Accurate and Portable
  R. Jagtap, S. Diestelhorst, A. Hansson, M. Jung and N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2016, Samos Island, Greece
  
  
• Approximate Computing with Partially Unreliable Dynamic Random Access Memory: Approximate DRAM (DOI, ACM Free Access, PDF)
  M. Jung, D. Mathew, C. Weis, N. Wehn. In Proc. IEEE/ACM Design Automation Conference (DAC), June, 2016, Austin, TX, USA.
  
  
• Efficient Reliability Management in SoCs - An Approximate DRAM Perspective (DOI, PDF)
  M. Jung, D. Mathew, C. Weis, N. Wehn. 21st Asia and South Pacific Design Automation Conference (ASP-DAC), Special Session: Cross-Layer Resilience: Snapshots from the Frontier of Design, January, 2016, Macao, China.
  
  

2015

• A Cross Layer Approach for Efficient Thermal Management in 3D Stacked SoCs (DOI)
  M. Jung, C. Weis, N. Wehn. Journal of Microelectronics Reliability, Elsevier 2015.
  
  
• Reliability and Thermal Challenges in 3D Integrated Embedded Systems (PDF)
  C. Weis, M. Jung, N. Wehn. 1st International ESWEEK Workshop on Resiliency in Embedded Electronic Systems, October, 2015, Amsterdam, The Netherlands.
  
  
• Omitting Refresh - A Case Study for Commodity and Wide I/O DRAMs (DOI, ACM Free Access, PDF)
  M. Jung, Éder Zulian, M. Mathew, M. Herrmann, C. Brugger, C. Weis, N. Wehn. ACM International Symposium on Memory Systems (MEMSYS 2015), October, 2015, Washington, DC, USA.
  
  
• DRAMSys: A flexible DRAM Subsystem Design Space Exploration Framework (DOI)
  M. Jung, C. Weis, N. Wehn. IPSJ Transactions on System LSI Design Methodology (T-SLDM), October, 2015.
  
  
• A High-Level DRAM Timing, Power and Area Exploration Tool (DOI)
  O. Naji, A. Hansson, C. Weis, M. Jung, N. Wehn. IEEE International Conference on Embedded Computer Systems Architectures Modeling and Simulation (SAMOS), July, 2015, Samos Island, Greece
  
  
• Thermal Aspects and High-level Explorations of 3D stacked DRAMs (DOI)
  C. Weis, M. Jung, C. Santos, P. Vivet, O. Naji, A. Hansson, N. Wehn. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July, 2015, Montpellier, France.
  
  
• A Custom Computing System for Finding Similarties in Complex Networks (DOI)
  C. Brugger, V. Grigorovici, M. Jung, C. Weis, C. De Schryver, K. Zweig, N. Wehn. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July, 2015, Montpellier, France.
  Amar Mukherjee Best Paper Award
  
  
• Coupling gem5 with SystemC TLM 2.0 Virtual Platforms (PPTX)
  M. Jung, N. Wehn. gem5 User Workshop, International Symposium on Computer Architecture (ISCA), June, 2015, Portland, OR, USA.
  
  
• Virtual Development on Mixed Abstraction Levels: an Agricultural Vehicle Case Study (PDF)
  M. Jung, T. Purusothaman, X. Pan, S. Piao, T. Kuhn, C. Grimm, K. Berns, N. Wehn., Synopsys Users Group Conference (SNUG), June, 2015, Munich, Germany.
  
  
• Retention Time Measurements and Modelling of Bit Error Rates of WIDE-I/O DRAM in MPSoCs (PDF)
  C. Weis, M. Jung, P. Ehses, C. Santos, P. Vivet, S. Goossens, M. Koedam, N. Wehn., IEEE Conference Design, Automation and Test in Europe (DATE), March, 2015, Grenoble, France.
  
  

2014

• Thermal and Power Aspects of MPSoCs with WIDE I/O DRAMs (Link)
  Invited Talk, D43D: The 6th Workshop on Design for 3D Silicon Integration, June 23-24, 2014, Lausanne, Switzerland
  
  
• Optimized Active and Power-Down Mode Refresh Control in 3D-DRAMs (PDF, DOI)
  M. Jung, M. Sadri, C. Weis, N. Wehn, L. Benini., VLSI-SoC, October, 2014, Playa del Carmen, Mexico.
  
  
• Thermal Modelling of 3D Stacked DRAM with Virtual Platforms (PDF)
  M. Jung, M. Sadri, N. Wehn. Ninth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES14), July, 2014, Fiuggi, Italy.
  
  
• Energy Optimization in 3D MPSoCs with Wide-I/O DRAM (DOI)
  M. Sadri, M. Jung, C. Weis, N. Wehn, L. Benini.Conference Design, Automation and Test in Europe (DATE), March, 2014, Dresden, Germany.
  
  

2013

• Virtual Platforms for Fast Exploration of Computing Systems in Finance (PDF)
  C. Brugger, M. Jung, S. Omland. Young Researcher Symposium 2013, November, 2013, Kaiserslautern.
  1. Best Paper Award.
  
  
• Virtual Platforms for Fast Memory Subsystem Exploration Using gem5 and TLM2.0 (PDF)
  M. Jung, M. Sadri, N. Wehn. Ninth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems (ACACES13), July, 2013, Fiuggi, Italy.
  
  
• Virtual Platforms for Memory Controller Design Space Exploration
  M. Jung, Designers Track Talk. IEEE/ACM Design Automation Conference (DAC), June, 2013, Austin, TX, USA.
  
  
• TLM Modelling of 3D Stacked Wide I/O DRAM Subsystems
  M. Jung, Work-in-Progress Poster Session, IEEE/ACM Design Automation Conference (DAC), June, 2013, Austin, TX, USA.
  
  
• Power Modelling of 3D-Stacked Memories with TLM2.0 based Virtual Platforms (PDF)
  M. Jung, C. Weis, P. Bertram, N. Wehn.Synopsys User Group Conference (SNUG), May, 2013, Munich, Germany.
  
  
• TLM Modelling of 3D Stacked Wide I/O DRAM Subsystems, A Virtual Platform for Memory Controller Design Space Exploration (DOI, ACM Free Access)
  M. Jung, C. Weis, N. Wehn, K. Chandrasekar.
  International Conference on High-Performance and Embedded Architectures and Compilers
  2013 (HiPEAC), Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), January, 2013, Berlin.
  
  

2012

• A Scalable Multi-Core ASIP Virtual Platform For Standard-Compliant Trellis Decoding (PDF)
  M. Jung, C. Brehm, N. Wehn.
  Synopsys User Group Conference (SNUG), May, 2012, Munich, Germany. 
  
  
• Energy Efficient Acceleration and Evaluation of Financial Computations Towards Real-Time Pricing (Link)
  C. de Schryver, M. Jung, N. Wehn, H. Marxen, A. Kostiuk, R. Korn. 
  Proceedings of the 15th International Conference on Knowledge-Based and Intelligent Information & Engineering Systems (KES), pages 177-186, September, 2011, Kaiserslautern. 

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